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 Microcontrollers ApNote
AP163201.EXE available
AP1632
additional file
Using the SSC (SPI) Interface in a Multimaster System
In the SAB C165 and C167, an internal High-Speed Synchronous Serial Interface is implemented providing serial communication between C167 / C165 or other microcontrollers with a transfer rate up to 5 Mbaud. The demo software is a multimaster full-duplex system in which at a given time one microcontroller is configured as master while all others are in slave mode.
Andreas Hettmann / Siemens Cupertino
Semiconductor Group
06.96, Rel. 01
Using the SSC (SPI) Interface in a Multimaster System
1 2 3 3.1 3.2 3.3 3.4 3.5 3.5.1 3.5.2 3.6 3.7 3.8 3.9 4 Introduction ............................................................................................................. 3 General operation and hardware environment for the SSC demo...................... 3 SSC demo software descrition .............................................................................. 5 Main program............................................................................................................ 5 System initialization .................................................................................................. 5 SSC initialization....................................................................................................... 6 Key service routine ................................................................................................... 7 Routines for SSC data transmission......................................................................... 8 Send data ................................................................................................................. 9 Receive data........................................................................................................... 10 Running LED light................................................................................................... 11 SSC scan routine.................................................................................................... 12 Creating the microcontroller executable files.......................................................... 12 Know problems ....................................................................................................... 14 Source codes and compiling tools ..................................................................... 15
4.1 SSC demo software: C code ................................................................................. 15 4.1.1 Main program - SSC.C............................................................................................ 15 4.1.2 System initialization - INIT_SYS.C ....................................................................... 16 4.1.3 SSC initialization - INIT_SSC.C18 4.1.4 Key interrupt service routine - KEY_INT.C ............................................................ 19 4.1.5 Running LED light - RUNLIGHT.C .......................................................................... 22 4.1.6 SSC scan routine - SSC_SCAN.C ........................................................................... 23 4.1.7 SSC receive interrupt service routine - RX_INT.C................................................. 24 4.1.8 SSC transmit routine - TX_SSC.C .......................................................................... 26 4.1.9 SSC transmit interrupt service routine - TX_INT.C................................................ 27 4.1.10 C header file - SSC.H ............................................................................................. 28 4.2 System register initialization, ASM code - INIT_167.SRC.................................... 29 4.3 Linker and locator control file - SSC.ILO ............................................................... 32 4.4 Locator output file - SSC.MAP................................................................................. 33 4.5 Miscellaneous files for compiling ............................................................................ 35 5 LED display board - schematic............................................................................ 40
AP1632 ApNote - Revision History Actual Revision : Rel.01 Previous Revison: none Page of Page of Subjects changes since last release) actual Rel. prev. Rel.
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1 Introduction
In the SAB C165 and C167, an internal High-Speed Synchronous Serial Interface is implemented providing serial communication between C167 / C165 or other microcontrollers with a transfer rate up to 5 MBaud at 20 MHz CPU clock. Due to the very flexible configuration options this interface can be used in a wide range of applications from simple external shift registers to expand the number of parallel ports or primitive pulse width modulation (PWM) to high-end protocol driven microcontroller networks. For a complete list of options for configuring the SSC refer to the C165 or C167 User's Manual, edition 8/94, section 11. Shown in the demo software is a multimaster full-duplex system in which at a given time one microcontroller is configured as master while all others are in slave mode. This demo software has been created to show an example how to use the High-Speed Synchronous Interface in a non-trivial application and to support solving of user specific demands concerning the SSC. Due to pin limitations at Port2 (only P2.0-P2.7 available) of the C165 it is recommended to use this software with C167 based boards only. 2 General operation and hardware environment for the SSC demo
VCC
ext nal er RAM
P1. 1. 0- 15 P4. 4. 0- 7
P0. P0. 0- 15
LED di ay ( LEDs) spl 16
I Codi Jum per D ng s
I
C167
R1, R3 R2, 3. 3k SSC ShitCl f ock SSC M ast Tr er ansm i /Sl Recei t ave ve SSC M ast Recei /Sl Tr er ve ave ansm i t
( t 16 boar up o ds; dem o sofw ar lm ied) t ei t
P3. SCLK 13/ P3. M TSR 9/ P3. M RST 8/
P2. 2. 0- 15 P3. 3. 1- 4
I Jum per LED D s, and Push Buton t
C167
C167
P3. 0 Push Buton t SSC Dem o Boar #1 d
SSC Dem o Boar #2 d
SSC Dem o Boar #3 d
Figure 1: Hardware for the SSC demonstration software As shown in fig. 1, up to 16 C167 based boards are connected in full-duplex operation via the SSC lines SCLK (SSC Shift Clock), MTSR (Master Transmit Slave Receive) and MRST (Master Receive Slave Transmit). Every board is identified by a combination of 4 jumpers on the LED display board providing a 4-bit board ID. These ID is used in creating and decoding messages to specify source and destination board. After starting the program, the current board ID value is displayed on the center part of the LED display.
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I Jum per LED D s, and Push Buton t
I
P3. SCLK 13/ P3. M TSR 9/ P3. M RST 8/
I
P3. SCLK 13/ P3. M TSR 9/ P3. M RST 8/
...
...
Using the SSC (SPI) Interface in a Multimaster System
Following the SSC and the board are configured to slave indicated by a running LED light. Pushing the button on the display board now forces the controller to create a message to be sent via the SSC requiring master status for the board when the current master is providing SSC Shift Clock. If there is no master in the system (e.g. after start-up of all boards) the controller waits for a certain time and automatically becomes master when no clock is applied. The LED display now shows in the center part the (binary) number to be added to the board ID resulting in the board ID of the remote controlled board. Remote controlled boards remaining in slave mode are accessed in ascending order by additional single clicks providing a wrap-around. Double-clicking the masters button will now result in toggling the direction of the running LEDs on the remote controlled board. Additionally, there is a 16 word data transfer performed between specified memory areas of master and slave which can only be detected using monitor software to view the memory or recording the SSC data flow using a digitizing scope in single-shot mode. A brief graphical overview of the activities is shown in the chart in fig.2
sw ich t SLA VE,show r to unni LED ,t ng oggl di ecton upon r eri ecei ved com m and f om cur ent m ast and r r r er ecei 16 w or ofdat ve ds a W A I FO R PRESSED KEY T
KEY ? SI G LE CLI N CK sw ich t M A STER,sw ich f w ar one boar to t or d d, show fxed LED patern and num ber ofcur ent i t r sl ave boar d # ofboar exceeded ? ds YES NO D O U BLE CLI CK
SLA VE: t oggl diecton ofLED on boar eri d M A STER t oggl diecton ofLED ofcur ent eri r sl ave boar t ansf 16 w or d, r er ds
%
REPEA T REPEA T
Figure 2: Flow of software from the user's view
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START UP P2. 0
1248
LED.. . P2. 15 Boar I dD of f on dependi on I st e ng D/ at P2. 15 OR fashi l ng r unni ng
SLAVE M O DE P2. 0
M ASTER M O DE P2. 0
1248
P2. 15 Boar I + num ber = I ofr ot boar dD D em e d
Figure 3: Functions of the LED display in different operating modes
3
SSC demo software
The software is divided into several modules each performing very specific actions described in the following sections. 3.1 Main program
Because the software is event-controlled (interrupts), the main program consist only of a system initialization routine call and a loop containing the IDLE instruction. Each time IDLE is executed the CPU is powered down while all peripherals like timers remain running. This state is held until an interrupt occurs (e.g. from SSC scan, running LED). After executing the system initialization all used state variables and on-chip devices like timers, PEC and SSC are configured. See also chapter 3.2 and 4.1.1. 3.2 System initialization
The system initialization routine INIT_SYS is executed only once during start-up and performs initialization of global variables and loading of the configuration registers of the used on-chip peripherals. These devices are configured as following: - Port2 to output for driving the LED display - Timer2 to 50 ms, used in master mode to provide all slave boards periodically with SSC clock - Timer5 to 50 ms, used in slave mode for the running LED pattern (one shift per timer overflow) - Timer0 as counter for P3.0 to detect pushed key - PEC0 to transfer one word from SSC receive buffer to receive data buffer in memory - PEC2 to transfer 16 words from SSC receive buffer to auto-incremented receive data buffer location in memory - SSC with fixed baudrate as defined in the C header file SSC.H - SSC to slave move (see also chapter 3.3) For the code listing of INIT_SYS.C see 4.1.2.
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3.3 SSC initialization
Prior to initialization it is required to disable the SSC by clearing the configuration register SSCCON. Then the pins used by the SSC (MRST, MTSR and SCLK) have to be configured whether to output or to input depending on the desired mode of the SSC. In master mode, SCLK providing shift clock for all SSC and the master transmit pin MTSR are outputs while the master receive pin has to be set to input (Port3 direction register DP3). In slave mode, all three port pins are configured to input (SCLK receives shift clock from the current master, MTSR is the slave receive line and MRST is only switched to output when the slave transmits data to the master to avoid collisions on this line). In order to use these alternate functions of Port3, the bits of the output latch are to be set to `1' because it is ANDed with the alternate function. In the demo software, the SSC is configured to a data width of 16 bit (SSCBM), transmit and receive MSB first (SSCHB), shift transmit data on the leading edge (SSCPH), idle clock line low (SSCPO) and ignoring all errors (SSCTEN,SSCREN,SSCPEN,SSCBEN), resulting in a initialization value of 0x805F in slave mode or 0xC05F in master mode (fig.3). Configuring and enabling the SSC is done by simply writing this value into SSCCON and takes only one instruction. For the code listing of the SSC initialization file, INIT_SSC.C, see 4.1.3.
8 or C SSCCON : SSC
SSC EN=0 M S SSC AREN SSC BEN SSC PEN
0
SSC REN SSC TEN SSC PO
5
SSC PH SSC HB
F
SSCBM
_
_
1
0/ 1
0
0
0
0
0
0
0
1
0
1
1
1
1
1
DI SABLE SSC erori er upt r nt r s i tSSC t M ASTER ( orSLAVE ( ni o 1) 0) ENABLE SSC ( evi st e SSCEN = 0 ! pr ous at )
16 bi dat wi h t a dt tans i /r ei M SB fr t r m t ec ve is s f tans i dat on l ng c oc edge hit r m t a eadi l k i e cock lne i HI dl l i s GH
Figure 4: Configuring the SSC in the demo software
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3.4 Key service routine
The key service routine is a interrupt service routine called by an Timer0 overflow interrupt caused by pressing the key or a spike on this line. Spikes and bursts induced by the key contact material of less than about 2 ms are filtered out by the routine SCAN and do not cause an erroneous action of the software. As shown in the flowchart (fig. 4) below the first assumption about the pressed key is to be a single click which would cause the transmission of master request and become master or, if already master, switching the remote slave boards as explained in chapter 1. But, if the key is pressed again within a time frame of 300 ms after releasing, this is recognized as an double click and forces the software in master mode to send a command to the remote controlled slave board to toggle the direction of the running LEDs and in slave mode to toggle the direction of the on-board LED display. For the code listing of the key interrupt service routine, KEY_INT.C, see 4.1.4.
K EY PRES SED ? NO
Y ES
KEY = SINGLE CLICK
w ai u n ti key rel t l eased i i alze & start T i er6 (300 m sec) n ti i m R E P E A T u n t l T i er6 exp i im red NO % K EY PRES SED ?
Y ES
KEY = DOUBLE CLICK
KEY ?
SINGLE CLICK
sw i ch o f S S C _S C A N t f cal l cu ate sel ected b o ard I ( = S T A T U S ) D NO
DOUBLE CLICK
S LA V E ? Y ES
SLAVE
i i SSC nt t S LA V E o
STATUS ? MAST ER
sw i ch o f ru n n i g LE D s t f n sh o w S T A T U S o n LE D s w as S LA V E ? NO Y ES t ran sm i t M A S T E R _R E Q sw i ch o n S S C _S C A N t
cal l cu ate I o f D rem o t co n t led e ro l b o ard
t ggl di o e recti n o o f o n -b o ard ru n n i g LE D n
sw i ch o n t ru n n i g LE D s n
t ran sm i D I _C H G tR t rem o t o e co n t led b o ard ro l t ran sf 16 w o rd s er t rem o te co n tro led o l b o ard
%
R E T U R N FR O M I T E R R U P T N
Figure 5: Key Interrupt Service Routine
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COMMAND NAME IDLE DIR_CHG
HEX VALUE 000 (0h) 101 (5h)
DESCRIPTION dummy command for SSC_SCAN, sent by master command 'toggle direction of running LEDs', sent by master to current remote controlled slave request become master, sent by slave acknowledge for MASTER_REQ, sent by master
MASTER_REQ 111 (7h) OK 010 (2h) Figure 6: Agenda of protocoll commands used in SSC communication 3.5 Routines for SSC data transmission
Since the serial SSC data is collected in a shift register transmitting and receiving is synchronized and performed at the same time. The pins MRST and MTSR are assigned to the input and the output of the shift register according to the operating mode (master or slave) so there is no need for external hardware to switch the pins in master or slave mode.
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3.5.1 Send data Transmitting data is performed by simply writing the data value into the SSC Transmit Buffer SSCTB. If the shift register is empty, that means, the last transmission is already finished, the contents of the SSCTB is copied immediately to the shift register. In master mode, transmission starts instantly by supplying SSC shift clock on SCLK and shifting out data on MTSR while in slave mode the data remains unchanged in the shift register until the remote master applies SSC shift clock. Data is then shifted out on MRST. In all modes, after copying the data from SSCTB to the shift register, an SSC transmit interrupt indicates a request for new data to be transmitted. This is especially used for transferring 16 words after the command DIR_CHG when the SSC transmit interrupt causes PEC1 to transfer data from a memory array to SSCTB without any interrupt service routine. For the C code of the routines TX_SSC.C and TX_INT.C see 4.1.8 and 4.1.9.
HEADER
SO URCE 4 bi t
SSC TRANSM I I T NTERRU PT & COM M AND = DI R_CHG: 16 tm es tansf TX_BUFFER t PEC 1 i r er o untlPEC 1 count = 0 i er r r SSC tansm i i er uptt i er uptser ce ediect r t nt r o nt r vi r i TX_I outne NT CO M M AND 5 bi t TX_BUFFER [ .16] 1.. 3 bi t DATA TO TRANSM I T 16 bi t
DESTI NATI ON 4 bi t
..
TX_BUFFER [ 0] TRANSM I W ORD T
16 bi t
.
CO M M AND = DI R_CHG ? SSC tansm i i er upt r t nt r diect t PEC 1;pr r ed o epar e PEC 1 f 16 w or tansf s or d r er
PE C
1
SSTRB ( SSC Tr ansm i Bufer t f) RECEI VED W ORD
16 bi t seraldat i a ShitRegi er f st SSC Recei Li ve ne
CO M M AND = M ASTER_REQ ? W AI FO R TRANSM I ON T SSI DONE ( SSCBSY = 0)OR EXPI RED TI ER ( > no cur entm ast ) M = r er i tt M ASTER ni o
Figure 7: Transmitting Data via SSC
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16 bi t
.. .
SSC Tr ansm i Li t ne
AP1632 06.96
Using the SSC (SPI) Interface in a Multimaster System
3.5.2 Receive data As mentioned, receiving of data via the SSC is always synchronized with transmitting data. If the selected number of bits is received data is automatically transferred from the shift register into the SSC receive buffer SSCRB. The software is then notified by an SSC receive interrupt to copy the value of SSCRB into any software buffer before the next SSC data word is received. In the demo software, initially the SSC receive interrupt is directed to PEC0 which transfers the received word into RX_BUFFER[0] and then calls the
SSC Tr ansm i Li t ne
SSCRB ( SSC Recei Bufer ve f) RECEI VED W ORD
16 bi t
16 bi t 16 bi t ShitRegi er f st DI R_CHG t oggl LED diecton e ri SSC r ve i er uptdiect t PEC 2 ecei nt r r ed o pr epar PEC 2 f 16 w or tansf s e or d r er colect seraldat l ed i a SSC Recei Li ve ne
0
SSC RECEI I VE NTERRUPT:
C PE
PE C
OR
2
r oad PEC 0 count ( el er 1)
RX_BUFFER [ 0] RECEI VED W ORD 4 bi t 4 bi t 5 bi t
16 bi t
RX_BUFFER [ .16] 1.. RECEI VED W ORD
.. .
3 bi t
HEADER
16 tm es t ansf PEC 2 t RX_BUFFER i r er o untlPEC 2 count = 0 i er
.. .
HEADER CORRUPT
SO URCE
r r SSC r ve i er uptt PEC 0 ediect ecei nt r o RETURN FROM I NTERRUPT
DESTI NATI ON
CO M M AN D
I DLE do not ng hi di d r ved dat scar ecei a
NO
T
M
E
M ASTER_REQ send OK t sl o ave becom e SLAVE i tSSC t SLAVE ni o SSC poli of lng f r unni LED on ng
OK becom e M ASTER i tSSC t M ASTER ni o r unni LED of ng f SSC poli on lng
RETURN FROM I NTERRUPT
Figure 8: Receiving Data via SSC
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interrupt service routine RX_INT because PEC0 counter has been decremented to 0. If the command DIR_CHG is decoded, the SSC receive interrupt is then directed to PEC2 which will transfer 16 consecutive words from the SSCRB to the RX_BUFFER. After that, RX_INT is called again (PEC2 counter = 0) and the SSC receive interrupt is redirected to PEC0 to prepare receiving of the next word. Depending on the received command, several actions will take place as shown in the diagram in Fig. 6. For the code listing of RX_INT refer to chapter 4.1.7. 3.6 Running LED light
The running LED light is controlled by the interrupt service routine RUNLIGHT which is called each time after an Timer5 overflow has occurred, that means, after the delay time for a LED left or right step is passed. The current LED status is obtained from a global variable, rotated to the right or to the left depending on the direction variable and written back to the global variable and to Port2 where the LEDs are connected to. Because Timer5 is not capable of self reload, the Timer5 control and timer registers have to be reloaded to feature the appropriate delay time and restart of the timer. For a graphical description see fig. 7, the C code of the routine RUNLIGHT.C can be found in chapter 4.1.5.
T5 (i Tm er5 reg it se 11 r)
1
m ask (ocalvarabl l i e) BI A SK TM 16 bi t
11
D I ( obalvari e) R gl abl
=1
=0
Ti 11 m Ti er5 m 11 ser er5 regi ste 1 vi i t ce n er r o 16 11 rou rup ve bi t r 11 ti ne t - fow >l sta ca 11 u rt of ses it ne rru pt
m ask
16 bi t 1 bi RI H T r at BI A SK tG ot ed TM
m ask 1 bi LEFT r at BI A SK t ot ed TM
16 bi t
BI A SK ( obalvar abl TM gl i e) BI A SK TM
16 bi t
P2 ( Port r st 2 egi er) new BI A SK TM
16 bi t
...
16 LED s i .r st s ncl esi or r oad Ti er r st el m 5 egi er ( m er contnues countng) Ti 5 i i
Figure 9: Timer 5 interrupt service routine for running LED light
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3.7 SSC scan routine
In master mode, the SSC scan routine is called by an expired Timer2 causing an interrupt and performs periodical transmitting of dummy words. This must be done because the transmitting master supplies all slaves with SSC shift clock in order to make transmitting of MASTER_REQ for the slave possible. After the master SSC starts transmitting, the Timer2 is reloaded and started to obtain constant scanning. For the code listing of this routine, SSC_SCAN.C, see 4.1.6. 3.8 Creating the microcontroller executable files
For running the SSC demo, the C code files and the assembly startup file have to be compiled, linked, located and converted into a format the monitor software is capable to upload into the microcontroller. When using the BSO/Tasking C compiler and the Hitop debugger light (Hitex), a make file (SSC.MAK; starting the make process by executing MAKE.BAT) has been prepared to control compiling. The make file is executed from the bottom of the file upwards depending on the file dates (newer source files will be converted, unaltered source files with existing converted files remain untouched). For control of linking of the modules and creating the interrupt vector table the file SSC.ILO is used containing information of module related interrupt numbers, classes memory locations and reserved areas not to be used by the user. A graphical overview of the use of the compiling tools by the MAKE utility for obtaining microcontroller executable files is shown in fig. 10. Note that the paths and DOS environment variables for the compiling tools have to be set by calling SETPATH.BAT (see listing in 4.5). Before loading the program code from SSC.HTX into the microcontroller memory, the controller has to be booted by executing BOOT.BAT, which causes BTDL.EXE to load the files BOOT.BSL (boot software, sets the system registers to required values depending on the hardware, e.g. memory waitstates, system stack size and prepares the controller to load the monitor) and EVA167.HEX (monitor software) into the microcontroller's memory to make communication between the PC based debugging software and the microcontroller possible. The monitor software has been slightly changed (not possible using the `light' version) to ensure matching hardware values in boot file and monitor. Then the debugging software has to be started by executing HIT1.BAT (edit this file for different COM port or transfer speed configurations). After loading (SSC.HTX and the symbol file SSC.SYM) and starting the SSC demo software by the Hitop debugger, it is recommended to leave the debugger because the extensive use of timers in the SSC software can interfere with the communication between PC and the debugger which results in the error message "Could not send command".
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SSC. /I I C N T_SSC. /I I C N T_SSC. /KEY_I T. /RX_I T. /TX_I T. C NC NC NC TX_SSC. /RU N LI H T. /SSC_SCA N . C G C C ( sec.4. 1 -4. 9) 1. 1. SSC. ( H sec.4. 10) 1. C -Com pier C166 l *. SRC fl ies II N T_167. SRC ( sec.4. 2)
A ssem bl A166 er *. BJ fl O ies
Li nker L166 *. O fl LN ies
SSC.LO ( I sec.4. 3)
Locat L166 er SSC. U T O SSC. AP ( M sec.4. 4)
I EEE695- ler I Fit EEE166
HEXConver er t I HEX166
SSC. 695 Sym bolPr ozessor epr SP166TA
SSC. HEX I elHEX f m at nt or
Fies f l or H I P D ebugger TO : ( sec.3. 8)
SSC. SYM
SSC. TX H
Figure 10: Making C16X controller executable files
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3.9 Known problems
The SSC normally operates at speeds up to 5 MBaud. Long signal lines and improper PCB design can cause the transmission to fail at higher baud rates because the output driver of the SSC lines meet only the standard requirements for TTL compatibility. During software development for the SSC demo the available C167 boards operated correctly only up to approximately 115 kBaud when connected together to a 3 or more board system. Only a system consisting of two C167 boards worked correctly up to the maximum transfer rate.
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4 4.1 4.1.1 Source codes and compiling tools SSC demo software: C code Main program - SSC.C
/****************************************************************************** * program : ssc.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : SSC demo * ******************************************************************************/ /* #pragma mod167 */ #include #include "ssc.h" extern void INIT_SYS (void); /* register definitions /* definitions */ */
/* use external routines */ */ */ */ */ */ */ */
#pragma global /* make next definitions useable for external C modules unsigned int STATUS; /* word STATUS = actual status of board (slave, ... unsigned int BOARD_ID; /* word BOARD_ID = board id as jumpered on P3.1-4 unsigned int BITMASK; /* word BITMASK = running LED actual output state bit DIR; /* bit DIR = current direction of running LEDs bit KEY_IDLE; /* bit KEY_IDLE = input level, key not pressed unsigned int RX_BUFFER [1 + TRANSFER_CNT], TX_BUFFER [1 + TRANSFER_CNT]; /* word array storing rec and transmit data interrupt (mainintno) void Int_MAIN (void); #pragma public interrupt (mainintno) { INIT_SYS (); void Int_MAIN() /* main task
/* main task interrupt# */ /* prototype definition */
*/
/* initialize all devices needed for the demo program */
while ( 1 ) /* infinite loop, program is event controlled (interrupts) */ { #pragma asm IDLE ;enter CPU idle mode, return to normal operation by interrupt #pragma endasm } }
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4.1.2 System initialization - INIT_SYS.C
/***************************************************************************** * program : init_sys.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : initializes system * *****************************************************************************/ #include #include "ssc.h" extern extern extern extern extern extern extern extern /* register definitions /* int # definitions */ */ */ */ */ */
bit DIR; /* global variables of bit type, defined in SSC.C bit KEY_IDLE; unsigned int STATUS; /* global variables of word type, def. in SSC.C unsigned int BOARD_ID; unsigned int BITMASK; unsigned int RX_BUFFER [1 + TRANSFER_CNT]; /* (word array) unsigned int TX_BUFFER [1 + TRANSFER_CNT]; void INIT_SSC (unsigned int); /* use external routine INIT_SSC
void INIT_SYS (void); #pragma global
/* prototype definition of routine */ /* make key_stat useable for external C modules */
void INIT_SYS (void) { DIR = 0; BITMASK = LED_START_MASK; KEY_IDLE = _getbit ( P3, 0 );
/* shift LED light left (init) */ /* init LED pattern */ /* get key input level (not pressed) */ */ */ */ */ */ */ */ */ */ */
_bfld ( DP3, 0x001E, 0x0000 ); /* switch P3.1 - P3.4 to input mode DP2 = ONES; /* switch P2.0 - 2.15 to output mode (LED's) P2 = 0x001E; /* output H on P2.1 - P2.4 BOARD_ID = ( P3 >> 1 ) & 0x000F; /* ...,get the jumper location, shift /* rightbound and store as ID P2 = BOARD_ID << 6; /* show ID on LED panel T6IR T6IE T6 T6CON = = = = 0; 0; 0x0000; 0x0047; /* clear Timer6 INT request flag /* and disable Timer 6 interrupt /* load timer register /* Timer6 counts up, fc=fcpu/512, timer starts
while ( ~T6IR ) { if ( T6 & 0x1000 ) P2 |= 0x0420; else P2 &= 0x03C0; } T6CON = 0x0000; T6IR = 0; _bfld ( T2IC, 0xFF, T2_INT ); T2 = MASTER_IDLE / 0.0128; T2CON = 0x00C5; _bfld ( T5IC, 0xFF, T5_INT ); T5 = LED_STEP;
/* wait for Timer6 overflow */ /* get flashing LED's @ P2.5 and P2.10 */ /* while waiting for Timer6 overflow */
/* stop Timer6 */ /* clear Timer6 interupt request flag */ /* set Timer2 INT priority & group level */ /* init Timer2 for SSC_SCAN */ /* count down, fc=fcpu/256, start timer */ /* rem.: Timer2 INT disabled, cf. SSC.H */ /* set Timer5 INT priority & group level */ /* init Timer5 for RUNLIGHT */
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/* /* _bfld ( T0IC, 0xFF, T0_INT ); /* T0 = 0xFFFF; /* T0REL = 0xFFFF; /* T01CON = 0x0049 + (char) KEY_IDLE;/* /* /* SRCP0 = (int) & SSCRB; /* DSTP0 = (int) & RX_BUFFER [0]; /* PECC0 = 0x0000 + 1; /* SSCRIC = 0x78; /* SRCP2 DSTP2 PECC2 = (int) & SSCRB; = (int) & RX_BUFFER [1]; = 0x200 + TRANSFER_CNT; T5CON = 0x00C7; count down, fc=fcpu/512, start timer */ rem.: Timer5 INT enabled, cf. SSC.H */ set Timer0 INT priority & group level */ preload timer register */ load reload register */ Timer0 as counter, input is P3.0 (HW) */ count up at L/H edge if key idle level*/ is L or at H/L edge if ~ is H */ PEC0 source is SSC receive buffer reg */ PEC0 dest is 1st word of rec array */ init PEC0, incr dest, 1 word transfer */ set SSC receive interrupt to PEC0 */
/* PEC2 source is SSC receive buffer reg */ /* PEC2 dest is 1st word of receive array */ /* incr dest, transfer defined # of words */
_bfld ( SSCTIC, 0xFF, SSC_T_INT ); /* set SSC transmit interrupt priority */ /* & group level */ STATUS = SLAVE; /* initial status of board is slave */
SSCCON = 0; /* reset SSC */ SSCBR = ( F_CPU * 1000000 / ( 2 * BAUD_RATE )) - 1; /* set baud rate reg */ INIT_SSC ( SLAVE ); /* calls SSC initialization routine */ }
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4.1.3 SSC initialization - INIT_SSC.C
/***************************************************************************** * program : init_ssc.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : initializes SSC * *****************************************************************************/ #include #include "ssc.h" void INIT_SSC (unsigned int); #pragma global void INIT_SSC ( mode ) unsigned int mode; { SSCCON = ZEROS; _bfld ( P3, 0x2300, 0x2300 ); /* and P3.13 (SCLK) /* register definitions /* definitions */ */
/* prototype definition for routine */
/* make init_ssc useable for external C modules */ /* local variable, word type */ /* stop and reset SSC */ /* set P3.8 (MRST), P3.9 (MTSR) */ */
/* _bfld ( ODP3, 0xFFFF, 0x2300 ); *//* open drain outp only for development */ switch ( mode ) /* branch depending on value of 'mode' */ { case SLAVE: _bfld ( DP3, 0x2300, 0x0000 ); /* switch MRST,MTSR and SCLK to input mode */ SSCCON = SSC_EN | SSC_SLAVE | SSCCON_INIT; /* init SSC as slave (cf. SSC.H) */ break; /* exit branch */ case MASTER: _bfld ( DP3, 0x2300, 0x2200 ); /* switch MRST to input; MTSR and SCLK to output mode */
SSCCON = SSC_EN | SSC_MASTER | SSCCON_INIT; /* init SSC as master (cf. SSC.H) */ break; /* exit branch */ } }
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4.1.4 Key interrupt service routine - KEY_INT.C
/***************************************************************************** * program : key_int.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : interupt service routine for push button * *****************************************************************************/ #include #include "ssc.h" extern extern extern extern extern extern /* register definitions /* int # definitions */ */
unsigned int STATUS; /* global variables of word type, def in SSC.C */ unsigned int BOARD_ID; bit DIR; /* global variables of bit type, def in SSC.C */ bit KEY_IDLE; void INIT_SSC (unsigned int); /* use external routines */ void TX_SSC (unsigned int, unsigned int, unsigned int); /* prototype def of routines */
interrupt (keyintno) void KEY_INT (void); bit SCAN (void); #pragma global
/* make key_int useable for external C modules */
interrupt (keyintno) void KEY_INT () { unsigned int key = 0, stat, board; /* local variables, word type */ /* key = type of button click */ /* stat = status of board */ /* board = # of remote board */ T0IE = 0; /* overhead */ /* inhibit INT of Timer0 */ T0IR = 0; /* overhead */ /* and clear request flag */ if ( SCAN () ) { key = SINGLE_CLICK; while ( SCAN () ) {} T6IR T6IE T6 T6CON = = = = 0; 0; T_1 / 0.0256; 0x00C7; /* branch if key pressed (filter out spikes) */ /* first assumption: single click */ /* wait for key release */ /* clear request flag of Timer6 /* and inhibit INT of Timer6 /* [T6] = time to wait for second click /* count down, fc=fcpu/512, timer starts */ */ */ */
while ( ~T6IR ) { if ( SCAN () ) key = DOUBLE_CLICK; } T6CON = 0x0000; } T0IR = 0; T0IE = 1; /* overhead */ /* overhead */
/* wait for a second click */ /* if second click detected */ /* it was a double click ! */ /* stop Timer6 */ /* clear request flag of Timer0 */ /* enable Timer0 interrupt */
stat = STATUS; switch ( key ) {
/* get STATUS into local var for faster access */ /* branch as the type of key stroke */
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case SINGLE_CLICK: T2IE = 0; /* SSC_SCAN off */ stat ++; /* increase status */ if ( stat > NO_OF_BOARDS - 1 ) /* wrap around */ stat = 0; STATUS = stat; /* put actual status to global var */ if ( stat == SLAVE ) /* now slave ? */ { INIT_SSC ( SLAVE ); /* init SSC to slave */ T5IE = 1; /* and enable running LEDs */ } else { T5IE = 0; /* stop running LEDs */ P2 = BACKGND_PATTERN | ( stat << STATUS_SHIFT ); /* and show actual status on LEDs */ if ( stat == MASTER ) /* was slave ? */ { _putbit ( 1, DP3, 8 ); /* switch MRST to output */ TX_SSC ( MASTER_REQ, BOARD_ID, ALL ); /* send master req */ } T2IE = 1; /* switch SSC_SCAN on */ } break; case DOUBLE_CLICK: if ( stat == SLAVE ) /* status eq slave ? */ DIR = ~DIR; /* toggle direction of running LEDs */ else { board = stat + BOARD_ID; /* calc # of remote board */ if ( board > NO_OF_BOARDS - 1 ) board -= NO_OF_BOARDS; TX_SSC ( DIR_CHG, BOARD_ID, board ); /* and send command ... */ /* to remote board to toggle running LED direction */ } break; } } bit SCAN (void) { int cnt = 0, status = 0; T4IR T4IE T4 T4CON = = = = 0; 0; T_2 / 0.0256; 0x00C6;
/* local variables, word type /* cnt = # of key scans */ /* status = key input value */ /* clear request flag of Timer4 /* and inhibit INT of Timer4 /* [T4] = key scanning time /* count down, fc=fcpu/512, start timer
*/ */ */ */ */
while ( ~T4IR ) { status += _getbit ( P3, 0 ); cnt ++; } T4CON = 0x0000; if ( (cnt - status) < status )
/* while Timer4 not expired */ /* accumulate key values */ /* and count loop cycles */ /* stop Timer4 */ /* key pressed for more than 50% of time ? */
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return ( P30_ACTIVE ^ KEY_IDLE ); else return ( P30_PASSIVE ^ KEY_IDLE ); }
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4.1.5 Running LED light - RUNLIGHT.C
/***************************************************************************** * program : runlight.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : LED runlight interrupt service routine * *****************************************************************************/ #include #include "ssc.h" /* register definitions /* int # definitions */ */
extern bit DIR; /* global variables of bit and word type, def in SSC.C */ extern unsigned int BITMASK; interrupt (t5intno) void RUNLIGHT (void); #pragma global /* prototype of routine */
/* make runlight useable for external C modules */
interrupt (t5intno) void RUNLIGHT (void) { unsigned int mask; mask = BITMASK;
/* local variable, word type */ /* mask = current LED output */ /* get bitmask into local var for faster access */
if ( DIR ) /* shift LEDs depending on current direction flag DIR */ mask = _ror ( mask, 1 ); else mask = _rol ( mask, 1 ); T5 = LED_STEP / 0.0256; /* reload Timer5 for running LEDs */ /* output computed bitmask to LEDs */ /* and store new value back in global variable */
P2 = mask; BITMASK = mask; }
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4.1.6 SSC scan routine - SSC_SCAN.C
/***************************************************************************** * program : ssc_scan.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : Master SSC scanning for Slave commands * *****************************************************************************/ #include #include "ssc.h" /* register definitions /* int # definitions */ */
extern unsigned int BOARD_ID; extern void TX_SSC (unsigned int, unsigned int, unsigned int); /* use external routine */ interrupt (t2intno) void SSC_SCAN (void); #pragma global /* prototype definition */
/* make ssc_scan useable for external C modules */
interrupt (t2intno) void SSC_SCAN (void) { TX_SSC ( IDLE, BOARD_ID, ALL ); /* send command IDLE to all remote boards /* rem.: this procedure is needed to /* supply all slaves with SSC clock /* periodically to ensure a slave request /* can be received by the master T2 = MASTER_IDLE / 0.0128; T2CON = 0x00C5; }
*/ */ */ */ */
/* reload timer */ /* count down, fc=fcpu/256, start timer */
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4.1.7 SSC receive interrupt service routine - RX_INT.C
/***************************************************************************** * program : rx_int.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : interupt service routine SSC receive * *****************************************************************************/ #include #include "ssc.h" extern extern extern extern extern extern /* register definitions /* definitions */ */
bit DIR; /* global variables of bit and word type, def in SSC.C */ unsigned int STATUS; unsigned int BOARD_ID; unsigned int RX_BUFFER [1 + TRANSFER_CNT]; void TX_SSC (unsigned int, unsigned int, unsigned int); void INIT_SSC (unsigned int); /* use external routines */ /* prototype of routine */
interrupt (rxintno) void RX_INT (void); #pragma global
/* make rx_int useable for external C modules */
interrupt (rxintno) void RX_INT () { unsigned int rec_word, rx_src, rx_dest, rx_msg; /* local vars,word type */ PECC0 = 0x0000 + 1; /* prepare PEC0 for receiving of next word via SSC */ */ */
if (( SSCRIC & 0x3F ) == 0x3A ) /* last transfer SSCRB -> mem via PEC2 ? { _bfld ( SSCRIC, 0x3F, 0x38 ); /* then switch back to PEC0 DSTP2 = (int) & RX_BUFFER [1]; /* PEC2 destination is 1st word of receive array */ PECC2 = 0x200 + TRANSFER_CNT; /* increment dest, transfer defined # of words */ } else { /* (last transfer via PEC0) rec_word = RX_BUFFER [0]; /* get rec value into local var rx_src = (rec_word & 0x0F00) >> 8; rx_dest = (rec_word & 0x00F8) >> 3; /* get received address rx_msg = rec_word & 0x0007; /* get received command
*/ */ */ */
if ( ((rec_word & 0xF000) != HEADER) || ((rx_dest != ALL) && (rx_dest != BOARD_ID)) ) /* header incorrect or received data */ return; /* doesn't belong to this board -> return */ switch ( rx_msg ) { case DIR_CHG: DIR break; /* branch as the command */ SSCRIC = 0x7A; = ~DIR; /* SSC rec INT now served by PEC2 */ /* toggle running LED direction */
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case MASTER_REQ: if ( STATUS != SLAVE ) /* is current master for */ { /* any remote board ? */ T2IE = 0; TX_SSC ( OK, BOARD_ID, rx_src ); STATUS = SLAVE; /* status becomes 'slave' */ INIT_SSC ( SLAVE ); /* init SSC as slave */ T5IE = 1; /* switch on running LEDs */ } break; case OK: { INIT_SSC ( MASTER ); T2IE = 1; } break; case IDLE: } } } break; /* rec word ist from scanning master */ if ( rx_dest == BOARD_ID )
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4.1.8 SSC transmit routine - TX_SSC.C
/***************************************************************************** * program : tx_ssc.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : SSC TX routines * *****************************************************************************/ #include #include "ssc.h" extern unsigned int TX_BUFFER [1 + TRANSFER_CNT]; void TX_SSC (unsigned int, unsigned int, unsigned int); #pragma global /* make tx_ssc /* register definitions /* int # definitions */ */
/* global word array */ /* prototype def */
useable for external C modules */
void TX_SSC ( cmd, src, dest ) unsigned int cmd, src, dest; { if ( cmd == DIR_CHG ) { SRCP1
/* local variables, word type */ /* cmd = command to be transmitted */ /* dest = address of destination board */ /* command for remote board to toggle /* direction of running LEDs ? */ */ */ */ */ */
= (int) & TX_BUFFER [1]; /* PEC1 source is 1st word of transmit buffer array DSTP1 = (int) & SSCTB; /* PEC1 destination is SSC transmit buffer reg PECC1 = 0x400 + TRANSFER_CNT; /* increment source address, transfer defined # of words SSCTIC = 0x79; /* SSC transmit interrupt now served by PEC1 } SSCTB = TX_BUFFER [0] /* /* /* /* /* } = HEADER | ( src << 8 ) | ( dest << 3 ) | cmd; build transmit word with header, address and command and write it into SSC transmit register. In master mode the transmission starts instantly, in slave mode the transmission starts when the remote master is transmitting
*/ */ */ */ */
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4.1.9 SSC transmit interrupt service routine - TX_INT.C
/***************************************************************************** * program : tx_int.c * * name : Andreas Hettmann Siemens, Cupertino/CA * * date : 5'96 * * function : interupt service routine SSC transmit * *****************************************************************************/ #include #include "ssc.h" extern void INIT_SSC (unsigned int); interrupt (txintno) void TX_INT (void); #pragma global interrupt { T3IR = T3 = T3CON = /* register definitions /* definitions */ */
/* prototype definition */
/* make tx_int useable for external C modules */
(txintno) void TX_INT () 0; /* clear Timer3 interrupt request flag */ WAIT_FOR_MASTER / 0.0256; /* [T3] = time to wait for remote master */ 0x00C6; /* count down, fc=fcpu/512, start timer */ /* wait for one of the following events: /* - remote master got transmitted word by /* supplying SSC clock for the board or /* - all other boards are in slave mode too, no /* remote master with SSC clock available, /* timer expires. Sending of command not /* neccesary. */ */ */ */ */ */ */
while ( SSCBSY && ~T3IR ) {}
if ( T3IR ) { INIT_SSC ( MASTER ); T2IE = 1; } T3CON = 0x0000; _bfld ( SSCTIC, 0xFF, SSC_T_INT ); /* stop Timer6 */ /* next SSC receive interrupt /* calls interrupt service routine /* tx_int, no transfer via PEC1 /* /* /* /* /* switch MRST to input mode rem.: in master mode already assigned, in slave mode assures that all inactive slave SSCs have high impedance TX output pins */ */ */ */ */ */ */ */
_putbit ( 0, DP3, 8 );
}
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4.1.10 C header file - SSC.H
#define NO_OF_BOARDS #define #define #define #define #define #define #define #define #define #define #define mainintno keyintno t2intno t5intno rxintno txintno ENABLE_INT T2_INT T5_INT T0_INT SSC_T_INT 3 0x50 0x20 0x22 0x25 0x2E 0x2D 0x40 /* # of boards being supported (max. 16) */ /* /* /* /* /* /* software hardware hardware hardware hardware hardware int for main program ssc.c interrupt # of Timer0 interrupt # of Timer2 interrupt # of Timer5 interrupt # of SSC receive interrupt # of SSC transmit ILVL 0x09 0x06 0x07 0x08 + + + + GLVL */ 0x00 0x00 0x00 0x00 */ */ */ */ */ */ */ */ */
/* sets xxxIE */
/* 4* ENABLE_INT + 4 * ENABLE_INT + 4 * ENABLE_INT + 4 *
#define SLAVE #define MASTER
0 1
/* /* const 'MASTER' defines ONLY the status /* after being slave !
#define KEY_NOT_PRESSED 0 #define SINGLE_CLICK 1 #define DOUBLE_CLICK 2 #define P30_PASSIVE #define P30_ACTIVE #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define T_1 T_2 LED_STEP MASTER_IDLE WAIT_FOR_MASTER BACKGND_PATTERN STATUS_SHIFT HEADER IDLE DIR_CHG MASTER_REQ OK ALL TRANSFER_CNT SSC_EN SSC_SLAVE SSC_MASTER SSCCON_INIT F_CPU BAUD_RATE 0 1 300 3 50 50 500 0xF81F 6 0x5000 0x00 0x05 0x07 0x02 0x10 16 0x8000 0x0000 0x4000 0x005F 20 115200 0x0707 /* /* /* /* /*
/* consts for routine key_int */
/* const for routine scan (key) */ msec, max. time betw. 2 clicks (dbl click) msec, key scanning time to detect spikes msec, time step for running LEDs msec, scan every ~ for slave's requests msec, slave waits for remote master /* background LED pattern in master mode /* displayed board # fits into pattern /* /* /* /* shifted header for SSC transmission dummy command for ssc_scan command 'toggle dir of running LEDs' request from slave to become master */ */ */ */ */ */ */ */ */ */ */
/* address for broadcasting */ /* words transferred data after DIR_CHG */ /* SSC enable bit SSCCON.15 /* init values for register SSCCON (slave) /* (master) /* SSC: MSB first, 16 bits data ea. TX/RX /* MHz, system clock frequency /* bd, SSC baud rate /* running LED starts with this pattern */ */ */ */ */ */ */
#define LED_START_MASK
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4.2 System register initialization, ASM code - INIT_167.SRC
$DEBUG $SYMBOLS $XREF $SEGMENTED $EXTEND $NOMOD166 $STDNAMES(reg167b.def) ;all C167 SFR's & Bit names ;----------- end of primary controls --------------------- program header: -;***************************************************************************** ;* program : INIT_167.SRC * ;* name : Harald Lehmann, Siemens, Cupertino/CA * ;* date : 12'95 * ;* function : System Initialization large memory model (SEGMENTED) * ;***************************************************************************** ;------------------------------------------------------------ definitions: -NAME init_167_segmented ;Modulname JMP_MAIN EQU 50H ;SW-interrupt for MAIN program
;---------------------------------------- system configuration for EVA167: -;----------------------------------------------------- externals, publics: -;--------------------------------------------------- stack, PEC, register: -SSKDEF 001b ;128 Words Init_RB REGBANK R0 ;not need just as an example ;------------------------------------------------------- CGROUPs, DGROUPs: -ROM_C_Group CGROUP Init_sec ;------------------------------------------------------------------- code: -Init_sec SECTION CODE 'INIT_ROM' Init_proc PROC TASK Init_167_Tsk INTNO Init_167_Int ASSUME DPP3:SYSTEM MOV DPP3,#3d NOP ;system datapage RESET Value ;necessary for the next instruction
;system configuration SYSCON, BUSCON0, BUSCON1 and BUSCON2: MOV SYSCON, #0010000100000100b ;(2104H) ;^^^^||||^^^^^|||+XPER-SHARE: 0 = no share of X-Periph ;^^^^||||^^^^^||+VISIBLE: 0= no visible mode for XPeriph ;^^^^||||^^^^^|+XRAMEN: 1 = XRAM selected ;^^^^||||^++++ -- don't care ;^^^^||||+ WRCFG: write configuration ;^^^^|||+ CLKEN: 1 = ENables system clock output on P3.15 ;^^^^||+ BYTDIS: 0 = BHE ENable ;^^^^|+ ROMEN: 0 = int. ROM DISable ;^^^^+ SGTDIS: 0 = segmented memory model ON ;^^^+ ROMS1: 0 = NO ROM mapping to segment 1 ;+++ STKSZ: 001 = 128 Words system stack size #0000010010111111b ;(04BFH) ;^^^^||||^^^^++++ MCTC 1111 = 0 WS ;^^^^||||^^^+ RWDC0 1 = NO delay ;^^^^||||^^+ MTTC0 0 = 1 WS, 1 = 0 WS
MOV BUSCON0,
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;^^^^||||++ BTYP bus mode: 16 Bit, DEMUX ;^^^^|||+ -- don't care ;^^^^||+ ALECTL0 0 = NO ALE lengthening ;^^^^|+ BUSACT0 1 = enables the BUSCONx function ;^^^^+ -- don't care ;^^^+ RDYEN0 0 = DISables the READY# function ;^^+ -- don't care ;++ = 00 always 0 for BUSCON0 MOV BUSCON1, #0000010010111111b ;(04BFH) ;^^^^||||^^^^++++ MCTC 1111 = 0 WS ;^^^^||||^^^+ RWDC0 1 = NO delay ;^^^^||||^^+ MTTC0 0 = 1 WS, 1 = 0 WS ;^^^^||||++ BTYP bus mode: 16 Bit, DEMUX ;^^^^|||+ -- don't care ;^^^^||+ ALECTL0 0 = NO ALE lengthening ;^^^^|+ BUSACT0 1 = enables the BUSCONx function ;^^^^+ -- don't care ;^^^+ RDYEN0 0 = DISables the READY# function ;^^+ -- don't care ;++ = 00 = address chip select #0000000000000100b ;(0004H) ;^^^^||||^^^^++++ 64K range size ;++++++++++++start address at 00 0000 (1st 64K-block)
MOV ADDRSEL1,
;MOV BUSCON2, #0000010001111101b ;(047DH) EXAMPLE NOT NEEDED! ;^^^^||||^^^^++++ MCTC 1110 = 1 WS ;^^^^||||^^^+ RWDC1 0= with delay ;^^^^||||^^+ MTTC1 1= 0 WS ;^^^^||||++ BTYP bus mode: 8Bit MUX ;^^^^|||+ -- don't care ;^^^^||+ ALECTL1 0= NO ALE lengthening ;^^^^|+ BUSACT1 1 = enables the BUSCONx function ;^^^^+ -- don't care ;^^^+ RDYEN1 0= DISables the READY# function ;^^+ -- don't care ;++ = 00 = address chip select ;MOV ADDRSEL2, #0001000000010000b ;(1010H) EXAMPLE NOT NEEDED! ;^^^^||||^^^^++++ 4K range size ;++++++++++++start address at 10 1000 (2nd 4K-block 1M-border) MOV CP,#Init_RB ; overwrites default value ;NOP is not necessary for the next instruction ; SP = FC00 = reset value (Stack Pointer) ; STKUN = FC00 = reset value (STacK UNderflow) ; MOV STKOV,#0FC00H+512 ;STacK OVerflow at base +(128 Word = 256Bytes) DISWDT EINIT MOV DPP0,#2d TRAP #JMP_MAIN STAY_IDLE: IDLE ;disable watchdog timer ;end of initialization ;page for data ;jump to main program ;IDLE-MODE should never reached, smthg wrong!
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JMP STAY_IDLE RETV ;NEVERENDING stay in IDLE mode forever ;to avoid the warning 'missing return'
Init_proc ENDP Init_sec ENDS ;---------------------------------------------------- end -------------------END
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4.3 Linker and locater control file - SSC.ILO
;***** SSC.ILO ***** (for the EVA167-monitor of HITEX) TASK INIT_167.lno TASK SSC.lno INIT_SYS.lno INIT_SSC.lno TX_SSC.lno TASK KEY_INT.lno TASK SSC_SCAN.lno TASK RUNLIGHT.lno TASK TX_INT.lno TASK RX_INT.lno IRAMSIZE(2048) CLASSES ('INIT_ROM' CLASSES ('CPROGRAM' CLASSES ('CNEAR' CLASSES ('CINITROM' ;CLASSES ('CUSTACK' CLASSES ('CBITS' VECTAB (1000H) INTNO = 0 INTNO = 50h ;task-name, Nr. 0 = RESET ;filename [.LNO] ;Task-Name, Int.Name + Nr.= SW-INTERRUPT ;filename [.LNO]
INTNO = 20h INTNO = 22h INTNO = 25h INTNO = 2Dh INTNO = 2Eh
;Task-Name, Int.Name + Nr.= TIMER0-INTERRUPT ;filename [.LNO] ;Task-Name, Int.Name + Nr.= TIMER2-INTERRUPT ;filename [.LNO] ;Task-Name, Int.Name + Nr.= TIMER5-INTERRUPT ;filename [.LNO] ;Task-Name, Int.Name + Nr.= SSC-TX-INTERRUPT ;filename [.LNO] ;Task-Name, Int.Name + Nr.= SSC-RX-INTERRUPT ;filename [.LNO] ;Internal RAM size is 2 KBytes for C167
(0A100H-0A200H)) (0A300H-0AFFFH)) (0B000H-0B1FFH)) (0B200H-0B3FFH)) (0B400H-0B5FFH)) (0FD00H-0FD01H))
;code of INIT_167 source file, start up ;code area for all C modules ;byte & word variables and arrays ; ;not needed here (C user stack) ;bit variables
; user interrupt vector table location
;Memory reservation for EVA167/165 with HITEX Monitor Telemon 167 RESERVE ( MEMORY (00000H-00221H, 01200H-0A00AH, 0FA00H-0FA3FH, 0FCC0H-0FCDFH))
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4.4 Locater output file - SSC.MAP
SN070076-042 Date: May 17 1996
80166 linker/locator v5.0 r0 ssc Memory map :
Ti
Name No. Start End Length Type Algn Comb Mem T Group Class ------------------------------------------------------------------------------------------------------------Reserved................... ... 000000h 000221h 000222h .... .... .... ... ................. .......... ?INTVECT................... ... 001000h 001003h 000004h .... .... .... ROM ................. .......... ?INTVECT................... ... 001080h 001083h 000004h .... .... .... ROM ................. .......... ?INTVECT................... ... 001088h 00108Bh 000004h .... .... .... ROM ................. .......... ?INTVECT................... ... 001094h 001097h 000004h .... .... .... ROM ................. .......... ?INTVECT................... ... 0010B4h 0010B7h 000004h .... .... .... ROM ................. .......... ?INTVECT................... ... 0010B8h 0010BBh 000004h .... .... .... ROM ................. .......... ?INTVECT................... ... 001140h 001143h 000004h .... .... .... ROM ................. .......... Reserved................... ... 001200h 00A00Ah 008E0Bh .... .... .... ... ................. .......... Init_sec................... 0 00A100h 00A12Dh 00002Eh CODE WORD PRIV ROM P ROM_C_Group.... INIT_ROM.. SSC_3_PR................... 6 00A300h 00A325h 000026h CODE WORD PUBL ROM ................. CPROGRAM.. INIT_SYS_1_PR.............. 8 00A320h 00A3FFh 0000E0h CODE WORD PUBL ROM ................. CPROGRAM.. INIT_SSC_1_PR.............. 9 00A400h 00A425h 000026h CODE WORD PUBL ROM ................. CPROGRAM.. TX_SSC_1_PR................ 10 00A426h 00A45Fh 00003Ah CODE WORD PUBL ROM ................. CPROGRAM.. KEY_INT_1_PR............... 11 00A460h 00A587h 000128h CODE WORD PUBL ROM ................. CPROGRAM.. SSC_SCAN_1_PR.............. 13 00A588h 00A5C7h 000040h CODE WORD PUBL ROM ................. CPROGRAM.. RUNLIGHT_1_PR.............. 15 00A5C8h 00A605h 00003Eh CODE WORD PUBL ROM ................. CPROGRAM.. TX_INT_1_PR................ 16 00A606h 00A653h 00004Eh CODE WORD PUBL ROM ................. CPROGRAM.. RX_INT_1_PR................ 18 00A654h 00A72Dh 0000DAh CODE WORD PUBL ROM ................. CPROGRAM.. RX_INT_2_NB................ 19 00B000h ....... 000000h DATA WORD PUBL RAM P C166_DGROUP.... CNEAR..... TX_INT_2_NB................ 17 00B000h ....... 000000h DATA WORD PUBL RAM P C166_DGROUP.... CNEAR..... SSC_SCAN_2_NB.............. 14 00B000h ....... 000000h DATA WORD PUBL RAM P C166_DGROUP.... CNEAR..... KEY_INT_2_NB............... 12 00B000h ....... 000000h DATA WORD PUBL RAM P C166_DGROUP.... CNEAR..... SSC_1_NB................... 4 00B000h 00B049h 00004Ah DATA WORD PUBL RAM P C166_DGROUP.... CNEAR..... C166_BSS................... 7 00B200h 00B209h 00000Ah DATA WORD GLOB ROM ................. CINITROM.. Extended SFR Area.......... ... 00F000h 00F1FFh 000200h .... .... .... RAM ................. .......... ESFR_AREA..................! 3 00F000h 00F1D7h 0001D8h DATA WORD AT.. RAM P DATAGRP........ .......... Reg. bank 0................ ... 00F600h 00F601h 000002h .... WORD .... RAM ................. .......... Reg. bank 1................ ... 00F602h 00F621h 000020h .... WORD .... RAM ................. .......... Reg. bank 2................ ... 00F622h 00F641h 000020h .... WORD .... RAM ................. .......... Reg. bank 3................ ... 00F642h 00F661h 000020h .... WORD .... RAM ................. .......... Reg. bank 4................ ... 00F662h 00F681h 000020h .... WORD .... RAM ................. .......... Reg. bank 5................ ... 00F682h 00F6A1h 000020h .... WORD .... RAM ................. .......... Reg. bank 6................ ... 00F6A2h 00F6C1h 000020h .... WORD .... RAM ................. .......... Reserved................... ... 00FA00h System Stack............... ... 00FB00h 00FA3Fh 00FBFFh
000040h .... .... .... ... ................. ..........
000100h .... .... .... RAM ................. ..........
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the SSC (SPI) Interface in a
Reserved................... ... SFR_AREA1.................. 1 SSC_2_BI................... 5 SFR Area................... ... SFR_AREA...................! 2 Interrupt table: 00FCC0h 00FCE0h 00FD00h.00 00FE00h 00FE00h 00FCDFh 00FCFFh 00FD00h.01 00FFFFh 00FFD7h 000020h 000020h 000002h 000200h 0001D8h .... DATA BIT .... DATA .... WORD BIT .... WORD .... AT.. PUBL .... AT.. ... RAM RAM RAM RAM ................. P DATAGRP........ ................. ................. P DATAGRP........
.......... .......... CBITS..... .......... ..........
Vector Intno Start Intnoname Taskname ------------------------------------------------------------------------------------------------------------0000000h 0000h 000A100h Init_167_Int.......................................... Init_167_Tsk.................. 0000080h 0020h 000A460h KEY_INT_INUM.......................................... KEY_INT_TASK.................. 0000088h 0022h 000A588h SSC_SCAN_INUM......................................... SSC_SCAN_TASK................. 0000094h 0025h 000A5C8h RUNLIGHT_INUM......................................... RUNLIGHT_TASK................. 00000B4h 002Dh 000A606h TX_INT_INUM........................................... TX_INT_TASK................... 00000B8h 002Eh 000A654h RX_INT_INUM........................................... RX_INT_TASK................... 0000140h 0050h 000A300h SSC_INUM.............................................. SSC_TASK...................... Error report
: W 141: module INIT_167.lno(init_167): overlapping memory ranges 'SFR_AREA' and 'SFR Area' W 141: module INIT_167.lno(init_167): overlapping memory ranges 'ESFR_AREA' and 'Extended SF total errors: 0, warnings: 2
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Using the SSC (SPI) Interface in a Multimaster System
4.5 Miscellaneous files for compiling
FILE MAKE.BAT:
mk166 -f ssc.mak >error.txt
FILE SSC.MAK:
# # # # # # # Makefile "ssc.mak" made by A.Hettmann, Siemens, Cupertino, CA, 03/96 This is for the HITEX simulator LIGHT and the BSO/T. You need these kind of enviroment: > PATH c:\BAT;C:\DOS;C:\;D:\NC;C:\...\TASKING\c166\BIN;C:\...\hitex\sim > set C166INC=c:\...\tasking\c166\include > set C166LIB=c:\...\tasking\c166\LIB\NP > set TMPDIR=C:\TEMP
# **** CREATE HITEX-FILES *** # This is done with Symbol preprocessor T C166 V2.31 "SP166TA.EXE" ssc.sym: ssc.695 \166\hitex\tools\pp166ta.231\sp166ta ssc.695 -v -fo # IEEE695-FILTER ssc.695: ssc.out ieee166 ssc.out ssc.695 # HEX-CONVERTER *** CREATE HEX-FILES *** ihex166 ssc.out ssc.hex # LOCATER # *** CREATE AN ABSOLUTE OBJEKT-FILE *** ssc.out: init_167.lno ssc.lno init_ssc.lno key_int.lno rx_int.lno tx_int.lno runlight.lno ssc_scan.lno init_sys.lno tx_ssc.lno ssc.ilo L166 @ssc.ilo NOVECINIT to ssc.out # LINKER init_167.lno: init_167.obj L166 init_167.obj sg_sfrta.obj to init_167.lno ssc.lno: ssc.obj L166 ssc.obj to ssc.lno init_ssc.lno: init_ssc.obj L166 init_ssc.obj to init_ssc.lno key_int.lno: key_int.obj L166 key_int.obj to key_int.lno rx_int.lno: rx_int.obj L166 rx_int.obj to rx_int.lno tx_int.lno: tx_int.obj L166 tx_int.obj to tx_int.lno runlight.lno: runlight.obj L166 runlight.obj to runlight.lno ssc_scan.lno: ssc_scan.obj L166 ssc_scan.obj to ssc_scan.lno init_sys.lno: init_sys.obj L166 init_sys.obj to init_sys.lno tx_ssc.lno: tx_ssc.obj L166 tx_ssc.obj to tx_ssc.lno # ASSEMBLER FOR MAINPROGRAM
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Using the SSC (SPI) Interface in a Multimaster System
ssc.obj: ssc.src A166 ssc.src DB EP CASE # ASSEMBLER FOR SSC INIT init_ssc.obj: init_ssc.src A166 init_ssc.src DB EP CASE # ASSEMBLER FOR KEY INTERRUPT SERVICE ROUTINE key_int.obj: key_int.src A166 key_int.src DB EP CASE # ASSEMBLER FOR RECEIVE INTERRUPT SERVICE ROUTINE rx_int.obj: rx_int.src A166 rx_int.src DB EP CASE # ASSEMBLER FOR TRANSMIT INTERRUPT SERVICE ROUTINE tx_int.obj: tx_int.src A166 tx_int.src DB EP CASE # ASSEMBLER FOR LED RUNLIGHT INTERRUPT SERVICE ROUTINE runlight.obj: runlight.src A166 runlight.src DB EP CASE # ASSEMBLER FOR SSC SCAN INTERRUPT SERVICE ROUTINE ssc_scan.obj: ssc_scan.src A166 ssc_scan.src DB EP CASE # ASSEMBLER FOR SYSTEM INIT init_sys.obj: init_sys.src A166 init_sys.src DB EP CASE # ASSEMBLER FOR TRANSMIT ROUTINE tx_ssc.obj: tx_ssc.src A166 tx_ssc.src DB EP CASE # C-COMPILER FOR MAINPROGRAM ssc.src: ssc.c ssc.h C166 -gf -t -Ml -x -s ssc.c # C-COMPILER FOR SSC INIT init_ssc.src: init_ssc.c ssc.h C166 -gf -t -Ml -x -s init_ssc.c # C-COMPILER FOR KEY INTERRUPT SERVICE ROUTINE key_int.src: key_int.c ssc.h C166 -gf -t -Ml -x -s key_int.c # C-COMPILER FOR RECEIVE INTERRUPT SERVICE ROUTINE rx_int.src: rx_int.c ssc.h C166 -gf -t -Ml -x -s rx_int.c # C-COMPILER FOR TRANSMIT INTERRUPT SERVICE ROUTINE tx_int.src: tx_int.c ssc.h C166 -gf -t -Ml -x -s tx_int.c # C-COMPILER FOR LED RUNLIGHT INTERRUPT SERVICE ROUTINE runlight.src: runlight.c ssc.h C166 -gf -t -Ml -x -s runlight.c # C-COMPILER FOR SSC SCAN INTERRUPT SERVICE ROUTINE
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Using the SSC (SPI) Interface in a Multimaster System
ssc_scan.src: ssc_scan.c ssc.h C166 -gf -t -Ml -x -s ssc_scan.c # C-COMPILER FOR SYSTEM INIT init_sys.src: init_sys.c ssc.h C166 -gf -t -Ml -x -s init_sys.c # C-COMPILER FOR TRANSMIT ROUTINE tx_ssc.src: tx_ssc.c ssc.h C166 -gf -t -Ml -x -s tx_ssc.c # ASSEMBLER FOR INIT init_167.obj: init_167.src A166 init_167.src DB EP CASE
FILE SETPATH.BAT:
PROMPT rem ****************************************************************** rem * "setpath.bat" prepare the enviroment for * rem * the PECR167 demo on the EVAL167 kit with * rem * Tasking 166 Evaluation Package * rem * *** SAB-C167 *** * rem * Harald Lehmann, SIEMENS, cupertino 11'95 * rem ****************************************************************** path=%PATH%;c:\166\TASKING\BIN;c:\EVAL167\HITEX;c:\EVAL167\HITEX\EXAMPLE set CCDEMO=c:\EVAL167\TASKING set C166INC=c:\EVAL167\TASKING\include set LINK166=LIBPATH(c:\166\TASKING\lib\EXT) c166t.lib set LOCATE166=CASE prompt $p$g
FILE BOOT.BAT:
\eval167\hitex\btld eva167.hex -r
FILE BTDL.CFG:
// configuration file for BTLD bootstrap loader for Siemens 16x V1.00 // Copyright (c) 1994 Hitex Systementwicklung GmbH // // supported keywords and values: // COM communication port, selection out of (1, 2) // BAUD baudrate, selection out of 9600/19200/38400 // TYPE type of processor, selection out of // (0 = 8xC166, 1 = C165/C167) // SYSCON hexadecimal value of register SYSCON to be loaded // BUSCON0 hexadecimal value of register BUSCON0 to be loaded // BUSCON1 hexadecimal value of register BUSCON1 to be loaded // ADDRSEL1 hexadecimal value of register ADDRSEL1 to be loaded // BUSCON2 hexadecimal value of register BUSCON2 to be loaded // ADDRSEL2 hexadecimal value of register ADDRSEL2 to be loaded // BUSCON3 hexadecimal value of register BUSCON3 to be loaded
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AP1632 06.96
Using the SSC (SPI) Interface in a Multimaster System
// ADDRSEL3 hexadecimal value of register ADDRSEL3 to be loaded // BUSCON4 hexadecimal value of register BUSCON4 to be loaded // ADDRSEL4 hexadecimal value of register ADDRSEL4 to be loaded // // the default value of not named busconfiguration registers is 0000 // COM 1 BAUD 38400 TYPE 1 // C167 SYSCON 2100 ADDRSEL1 4 BUSCON0 04BF BUSCON1 04BF // // MOV SYSCON, #0010000100000000b ;(2100H) // ;^^^^||||^^^^^|||+XPER-SHARE: 0 = no share of X-Periph // ;^^^^||||^^^^^||+VISIBLE: 0= no visible mode for XPeriph // ;^^^^||||^^^^^|+XRAMEN: 0 = XRAM deselected // ;^^^^||||^++++ -- don't care // ;^^^^||||+ WRCFG: write configuration // ;^^^^|||+ CLKEN:1 = ENables system clock output on P3.15 // ;^^^^||+ BYTDIS: 0 = BHE ENable // ;^^^^|+ ROMEN: 0 = int. ROM DISable // ;^^^^+ SGTDIS: 0 = segmented memory model ON // ;^^^+ ROMS1: 0 = NO ROM mapping to segment 1 // ;+++ STKSZ: 001 = 128 Words system stack size // // MOV BUSCON0, #0000010010111111b ;(04BFH) // ;^^^^||||^^^^++++ MCTC 1111 = 0 WS // ;^^^^||||^^^+ RWDC0 1 = NO delay // ;^^^^||||^^+ MTTC0 0 = 1 WS, 1 = 0 WS // ;^^^^||||++ BTYP bus mode: 16 Bit, DEMUX // ;^^^^|||+ -- don't care // ;^^^^||+ ALECTL0 0 = NO ALE lengthening // ;^^^^|+ BUSACT0 1 = enables the BUSCONx function // ;^^^^+ -- don't care // ;^^^+ RDYEN0 0 = DISables the READY# function // ;^^+ -- don't care // ;++ = 00 always 0 for BUSCON0 // // // MOV BUSCON1, #0000010010111111b ;(04BFH) // ;^^^^||||^^^^++++ MCTC 1111 = 0 WS // ;^^^^||||^^^+ RWDC0 1 = NO delay // ;^^^^||||^^+ MTTC0 0 = 1 WS, 1 = 0 WS // ;^^^^||||++ BTYP bus mode: 16 Bit, DEMUX // ;^^^^|||+ -- don't care // ;^^^^||+ ALECTL0 0 = NO ALE lengthening // ;^^^^|+ BUSACT0 1 = enables the BUSCONx function // ;^^^^+ -- don't care // ;^^^+ RDYEN0 0 = DISables the READY# function // ;^^+ -- don't care // ;++ = 00 = address chip select // // MOV ADDRSEL1, #0000000000000100b ;(0004H) // ;^^^^||||^^^^++++ 64K range size // ;++++++++++++start address at 00 0000 (1st 64K-block)
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AP1632 06.96
Using the SSC (SPI) Interface in a Multimaster System
FILE HIT1.BAT:
\166\hitex\mon\hit_167.exe -p1 -b384 -y -rhit_167.rst REM used command line parameters for HIT_167.EXE: REM -p1 COM1 for communication REM -b384 38400 baud REM -y assume YES for reloading of recent used files REM -rhit_167.rst use restore file hit_167.rst
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AP1632 06.96
Using the SSC (SPI) Interface in a Multimaster System
5 LED display board - schematic
1 2 3 4
D J1 CONNECTOR EDGE50 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 7 6 5 GND VCC (+5V) GND VCC (+5V) P5.0 P5.1 P5.2 P5.3 P5.4 P5.5 P5.6 P5.7 P5.8 P5.9 VAGND S1I VAREF S1O P2.0 P3.0 P2.1 P3.1 P2.2 P3.2 P2.3 P3.3 P2.4 P3.4 P2.5 P3.5 P2.6 P3.6 P2.7 P3.7 P2.8 P3.8 P2.9 P3.9 P2.10 P3.10 P2.11 P3.11 P2.12 P3.12 P2.13 P3.13 P2.14 P3.14 P2.15 P3.15 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 VCC
VCC J2 1 2 3
D
2
CON3 R1 10K SW1 SW-PB VCC J3 2 1 2 3 CON3 1 1 1 C R2 15K R5 15K
1 1 R4 15K
C
R3 15K
2
2
DA3 LED_ARRAY4 8
DA1 LED_ARRAY4 8
DA2 LED_ARRAY4 8
A1
A2
A3
A4
A1
A2
A3
A4
A1
A2
A3
A4
A1
DA4 LED_ARRAY4 8
7
6
5
7
6
5
7
6
5
A2
A3
B
A4
2
B
K1
K2
K3
K4
K1
K2
K3
K4
K1
K2
K3
K4
K1
K2
K3 3
1
2
3
4
1
2
3
4
1
2
3
4
1
2
1 2 3 4 5 6 7 8 9 10
10 9 8 7 6 5 4 3 2 1
4
K4
A
Title Size A RN2 510 OHM 1 2 RN1 510 OHM Date: File: 3
MCB FAE TRAINING AID
Number Revision 31-May-1996 Sheet 1 of 1 F:\CLIENT\SCH3\MCB\MCB_FAE3.SCH By: W.MILLER Drawn 4
A
Rem.: Jumpers for Board ID are to be set between P2.1 / P3.1 (Bit 0, LSB), P2.2 / P3.2 (Bit 1), P2.3 / P3.3 (Bit 2) and P2.4/P3.4 (Bit 3, MSB). When P2.1 through P2.4 are set to log. `1', reading the input levels of P3.1 through P3.4 results in log. `1' for positions with jumper and log. `0' without jumper. Additionally, there have jumpers to be set on the CON3 connectors so that pushing the button results in a H/L or L/H transition at P3.0 .
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AP1632 06.96


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